The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Currently, one of the challenges of integrated circuit (IC) manufacturing is delamination that occurs between materials having a different coefficient of thermal expansion (CTE). For example, a CTE mismatch between a solder mask material and a metal material of a substrate can cause stresses between the materials during heating/cooling that results in structural defects such as delamination.